BCM4354KKWBGT Datasheet, PDF (12/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
Table of Contents
Section 18: Internal Regulator Electrical Specifications ............................................. 158
Core Buck Switching Regulator.............................................................................................................. 158
3.3V LDO (LDO3P3) .................................................................................................................................. 159
3.3V LDO (LDO3P3_B).............................................................................................................................. 160
2.5V LDO (BTLDO2P5) ............................................................................................................................. 161
CLDO ......................................................................................................................................................... 162
LNLDO ....................................................................................................................................................... 163
Section 19: System Power Consumption...................................................................... 164
WLAN Current Consumption................................................................................................................... 164
Bluetooth and FM Current Consumption ............................................................................................... 166
Section 20: Interface Timing and AC Characteristics .................................................. 167
SDIO Timing .............................................................................................................................................. 167
SDIO Default Mode Timing ................................................................................................................. 167
SDIO High-Speed Mode Timing.......................................................................................................... 169
SDIO Bus Timing Specifications in SDR Modes ................................................................................. 170
Clock Timing ................................................................................................................................ 170
Device Input Timing ..................................................................................................................... 171
Device Output Timing................................................................................................................... 172
SDIO Bus Timing Specifications in DDR50 Mode............................................................................... 174
Data Timing, DDR50 Mode .......................................................................................................... 175
HSIC Interface Specifications.................................................................................................................. 176
PCI Express Interface Parameters .......................................................................................................... 177
JTAG Timing ............................................................................................................................................. 179
Section 21: Power-Up Sequence and Timing ............................................................... 180
Sequencing of Reset and Regulator Control Signals ........................................................................... 180
Description of Control Signals ............................................................................................................. 180
Control Signal Timing Diagrams.......................................................................................................... 181
Section 22: Package Information ................................................................................... 184
Package Thermal Characteristics ........................................................................................................... 184
Junction Temperature Estimation and PSI_JT Versus Theta_JC.............................................................. 185
Environmental Characteristics................................................................................................................ 185
Section 23: Mechanical Information .............................................................................. 186
Section 24: Ordering Information .................................................................................. 190
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October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
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