BCM4354KKWBGT Datasheet, PDF (169/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
SDIO Timing
Table 51: SDIO Bus Timing^a Parameters (Default Mode)
Parameter
Symbol Minimum Typical
SDIO CLK (All values are referred to minimum VIH and maximum VIL^b)
Frequency – Data Transfer mode
fPP
0
–
Frequency – Identification mode
fOD
0
–
Clock low time
Clock high time
Clock rise time
Clock low time
tWL
10
–
tWH
10
–
tTLH
–
–
tTHL
–
–
Inputs: CMD, DAT (referenced to CLK)
Input setup time
Input hold time
tISU
5
–
tIH
5
–
Outputs: CMD, DAT (referenced to CLK)
Output delay time – Data Transfer mode
tODLY 0
–
Output delay time – Identification mode
tODLY 0
–
a. Timing is based on CL  40pF load on CMD and Data.
b. Min. (Vih) = 0.7 × VDDIO and max. (Vil) = 0.2 × VDDIO.
Maximum Unit
25
MHz
400
kHz
–
ns
–
ns
10
ns
10
ns
–
ns
–
ns
14
ns
50
ns
Broadcom^®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 168