BCM4354KKWBGT Datasheet, PDF (106/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
Signal Descriptions
Table 21: WLCSP Signal Descriptions (Cont.)
Bump# Signal Name
Type Description
WLAN SDIO Bus Interface
These signals can support alternate functionality depending on package and host interface mode. See
Table 26: “GPIO Alternative Signal Functions,” on page 120
78
SDIO_CLK
81
SDIO_CMD
82
SDIO_DATA_0
77
SDIO_DATA_1
80
SDIO_DATA_2
79
SDIO_DATA_3
WLAN HSIC Interface
100
HSIC_STROBE
101
HSIC_DATA
99
RREFHSIC
I SDIO clock input
I/O SDIO command line
I/O SDIO data line 0
I/O SDIO data line 1
I/O SDIO data line 2
I/O SDIO data line 3
I/O HSIC Strobe
I/O HSIC Data
I HSIC reference resistor input. If HSIC is used,
connect this pin to ground via a 51-ohm 5% resistor.
On SDIO designs this pin should not be connected.
WLAN GPIO Interface
The GPIO signals can be multiplexed via software and the JTAG_SEL pin to support other functions. See
Table 23: “WLAN GPIO Functions and Strapping Options,” on page 119 and Table 26: “GPIO Alternative Signal
Functions,” on page 120 for additional details.
218
GPIO_0
219
GPIO_1
220
GPIO_2
221
GPIO_3
229
GPIO_4
237
GPIO_5
236
GPIO_6
189
GPIO_7
196
GPIO_8
205
GPIO_9
185
GPIO_10
192
GPIO_11
199
GPIO_12
182
GPIO_13
188
GPIO_14
195
GPIO_15
JTAG Interface
239
JTAG_SEL
I/O Programmable GPIO pins
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O JTAG select: pull high to select the JTAG interface. If
the JTAG interface is not used this pin may be left
floating or connected to ground.
Note: See Table 26: “GPIO Alternative Signal
Functions,” on page 120 for the JTAG signal pins.
Broadcom^®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 105