BCM4354KKWBGT Datasheet, PDF (177/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
HSIC Interface Specifications
HSIC Interface Specifications
Table 59: HSIC Interface Parameters
Parameter
Symbol Minimum Typical
Maximum Unit Comments
HSIC signaling voltage
V_DD
I/O voltage input low
V_IL
I/O Voltage input high
V_IH
I/O voltage output low
V_OL
I/O voltage output high
V_OH
I/O pad drive strength
O_D
1.1
1.2
–0.3
–
0.65 × V_DD –
–
–
0.75 × V_DD –
40
–
I/O weak keepers
I_L
20
–
I/O input impedance
Z_I
100
–
Total capacitive load^a
C_L
3
–
Characteristic trace
T_I
45
50
impedance
Circuit board trace length T_L
–
–
Circuit board trace
T_S
–
–
propagation skew^b
STROBE frequency^c
F_STROBE 239.988
240
1.3
V
0.35 × V_DD V
V_DD + 0.3 V
0.25 × V_DD V
–
V
60
Ω
70
mA
–
kΩ
14
pF
55
Ω
10
cm
15
ps
–
–
–
–
–
Controlled output
impedance driver
–
–
–
–
–
–
240.012
MHz ± 500 ppm
Slew rate (rise and fall) T_slew
0.60 × V_DD 1.0
1.2
V/ns Averaged from
STROBE and DATA^C
30% ~ 70% points
Receiver data setup time T_s
300
–
–
ps
Measured at the
(with respect to STROBE)^c
50% point
Receiver data hold time T_b
300
–
–
ps
Measured at the
(with respect to STROBE)^c
50% point
a. Total Capacitive Load (C_L), includes device Input/Output capacitance, and capacitance of a 50Ω PCB trace with
a length of 10 cm.
b. Maximum propagation delay skew in STROBE or DATA with respect to each other. The trace delay should be
matched between STROBE and DATA to ensure that the signal timing is within specification limits at the
receiver.
c. Jitter and duty cycle are not separately specified parameters, they are incorporated into the values in the
Table 59.
Broadcom^®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 176