BCM4354KKWBGT Datasheet, PDF (163/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
CLDO
CLDO
Table 47: CLDO Specifications
Specification
Notes
Min. Typ. Max. Units
Input supply voltage, V_in
Min. = 1.2 + 0.15V = 1.35V dropout voltage 1.3 1.35 1.5 V
requirement must be met under maximum
load.
Output current
Output voltage, V_o
Dropout voltage
Output voltage DC accuracy
Quiescent current
–
Programmable in 25 mV steps.
Default = 1.2.V
At max. load
Includes line/load regulation
No load
0.2 –
300 mA
1.1 1.2 1.275 V
–
–
150 mV
–4 –
+4 %
– 24 – µA
Line Regulation
Load Regulation
Leakage Current
PSRR
Start-up Time of PMU
LDO Turn-on Time
External Output Capacitor, C_o
External Input Capacitor
300 mA load
– 2.1
V_in from (V_o + 0.15V) to 1.5V, maximum load –
–
Load from 1 mA to 300 mA
– 0.02
Power down
––
Bypass mode
–1
@1 kHz, Vin ≥ 1.35V, C_o = 4.7 µF
20 –
VIO up and steady. Time from the REG_ON – –
rising edge to the CLDO reaching 1.2V.
LDO turn-on time when rest of the chip is up – 140
Total ESR: 5 mΩ–240 mΩ
1.32^{a 4.7}
Only use an external input capacitor at the – 1
VDD_LDO pin if it is not supplied from
CBUCK output.
–
5
0.05
20
3
–
700
180
–
2.2
mA
mV/V
mV/mA
µA
µA
dB
µs
µs
µF
µF
a. Minimum capacitor value refers to the residual capacitor value after taking into account the part–to–part
tolerance, DC–bias, temperature, and aging.
Broadcom^®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 162