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BCM4354KKWBGT Datasheet, PDF (114/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver
BCM4354 Data Sheet
Signal Descriptions
Table 22: WLBGA Signal Descriptions
Ball# Signal Name
Type Description
WLAN SDIO Bus Interface
Note: These signals can support alternate functionality depending on package and host interface mode. See
Table 26: “GPIO Alternative Signal Functions,” on page 120 for additional details.
A8
SDIO_CLK
A9
SDIO_CMD
B9
SDIO_DATA_0
C9
SDIO_DATA_1
I SDIO clock input
I/O SDIO command line
I/O SDIO data line 0
I/O SDIO data line 1
B8
SDIO_DATA_2
I/O SDIO data line 2
C8
SDIO_DATA_3
I/O SDIO data line 3
WLAN HSIC Interface
A7
HSIC_STROBE
A6
HSIC_DATA
D7
RREFHSIC
I/O HSIC Strobe
I/O HSIC Data
I HSIC reference resistor input. If HSIC is used,
connect this pin to ground via a 51-ohm 5% resistor.
On SDIO designs this pin should not be connected.
WLAN GPIO Interface
Note: The GPIO signals can be multiplexed via software and the JTAG_SEL pin to support other functions.
See Table 23: “WLAN GPIO Functions and Strapping Options,” on page 119 and Table 26: “GPIO Alternative
Signal Functions,” on page 120 for additional details.
G11
GPIO_0
I/O Programmable GPIO pins
F10
GPIO_1
I/O
F11
GPIO_2
I/O
G9
GPIO_3
I/O
H9
GPIO_4
I/O
F9
GPIO_5
I/O
F8
GPIO_6
I/O
E7
GPIO_7
I/O
F7
GPIO_8
I/O
E6
GPIO_9
I/O
H12
GPIO_10
I/O
–
GPIO_11
I/O
–
GPIO_12
I/O
–
GPIO_13
I/O
–
GPIO_14
I/O
–
GPIO_15
I/O
Broadcom®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 113