EP2S30F484C4N Datasheet, PDF (79/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

Figure 2–46. Stratix II IOE Structure
Logic Array
OE
OE Register
DQ
Stratix II Architecture
OE Register
DQ
Output A
Output B
Output Register
DQ
CLK
Output Register
DQ
Input A
Input B
Input Register
DQ
Input Register Input Latch
DQ
DQ
ENA
The IOEs are located in I/O blocks around the periphery of the Stratix II
device. There are up to four IOEs per row I/O block and four IOEs per
column I/O block. The row I/O blocks drive row, column, or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 2–47 shows how a row I/O block connects to the logic array.
Figure 2–48 shows how a column I/O block connects to the logic array.
Altera Corporation
May 2007
2–71
Stratix II Device Handbook, Volume 1