EP2S30F484C4N Datasheet, PDF (181/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

DC & Switching Characteristics
Table 5–53. EP2S60 Column Pins Global Clock Timing Parameters
Parameter
t_{C I N}
t_{C O U T}
t_{P L L C I N}
t_{P L L C O U T}
Minimum Timing
Industrial Commercial
1.658
1.501
0.06
-0.097
1.739
1.574
0.057
-0.108
-3 Speed
Grade
2.920
2.678
0.278
0.036
-4 Speed
Grade
3.350
3.072
0.304
0.026
Table 5–54. EP2S60 Row Pins Regional Clock Timing Parameters
Parameter
t_{C I N}
t_{C O U T}
t_{P L L C I N}
t_{P L L C O U T}
Minimum Timing
Industrial Commercial
1.463
1.468
-0.153
-0.148
1.532
1.537
-0.167
-0.162
-3 Speed
Grade
2.591
2.587
-0.079
-0.083
-4 Speed
Grade
2.972
2.968
-0.099
-0.103
Table 5–55. EP2S60 Row Pins Global Clock Timing Parameters
Parameter
t_{C I N}
t_{C O U T}
t_{P L L C I N}
t_{P L L C O U T}
Minimum Timing
Industrial Commercial
1.439
1.444
-0.161
-0.156
1.508
1.513
-0.174
-0.169
-3 Speed
Grade
2.562
2.558
-0.083
-0.087
-4 Speed
Grade
2.940
2.936
-0.107
-0.111
-5 Speed
Grade
Unit
3.899
ns
3.575
ns
0.355
ns
0.031
ns
-5 Speed
Grade
Unit
3.453
ns
3.448
ns
-0.128
ns
-0.133
ns
-5 Speed
Grade
Unit
3.421
ns
3.416
ns
-0.126
ns
-0.131
ns
Altera Corporation
April 2011
5–45
Stratix II Device Handbook, Volume 1