EP2S30F484C4N Datasheet, PDF (22/238 Pages) Altera Corporation – Section I. Stratix II Device Family Data Sheet

Adaptive Logic Modules
Figure 2–10. Template for Supported Seven-Input Functions in Extended LUT Mode
datae0
datac
dataa
datab
datad
dataf0
datae1
5-Input
LUT
5-Input
LUT
combout0
DQ
reg0
To general or
local routing
To general or
local routing
dataf1
(1)
This input is available
for register packing.
Note to Figure 2–10:
(1) If the seven-input function is unregistered, the unused eighth input is available for register packing. The second
register, reg1, is not available.
Arithmetic Mode
The arithmetic mode is ideal for implementing adders, counters,
accumulators, wide parity functions, and comparators. An ALM in
arithmetic mode uses two sets of two four-input LUTs along with two
dedicated full adders. The dedicated adders allow the LUTs to be
available to perform pre-adder logic; therefore, each adder can add the
output of two four-input functions. The four LUTs share the dataa and
datab inputs. As shown in Figure 2–11, the carry-in signal feeds to
adder0, and the carry-out from adder0 feeds to carry-in of adder1. The
carry-out from adder1 drives to adder0 of the next ALM in the LAB.
ALMs in arithmetic mode can drive out registered and/or unregistered
versions of the adder outputs.
2–14
Stratix II Device Handbook, Volume 1
Altera Corporation
May 2007