AK4691 Datasheet, PDF (70/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

[AK4691]
Addr
08H
Register Name
HP/SPK Gain
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
MICL2 MICR1 MICL1 HPG SPKG1 SPKG0
RD
RD
R/W
R/W R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
SPKG1-0: Speaker-Amp Output Gain Select (Table 52)
HPG: Headphone-Amp Gain Select (Table 48)
0: 0dB (default)
1: +3.6dB
MICL1: Select path from Lch Pre-Amp #1 to LOUT pin.
0: OFF (default)
1: ON
When PMMICL1 = PMLO bits = “1”, MICL1 bit is enabled.
MICR1: Select path from Rch Pre-Amp #1 to LOUT pin
0: OFF (default)
1: ON
When PMMICR1 = PMLO bits = “1”, MICR1 bit is enabled.
MICL2: Select path from Lch Pre-Amp #2 to LOUT pin
0: OFF (default)
1: ON
When PMMICL2 = PMLO bits = “1”, MICL2 bit is enabled.
Addr
09H
Register Name
Mode Control 4
R/W
Default
D7
D6
D5
D4
D3
LVOL2 LVOL1 LVOL0 LOPS
0
R/W
R/W
R/W
R/W
RD
0
0
0
0
0
D2
D1
D0
0
DVOLC IVOLC
RD
R/W
R/W
0
1
1
IVOLC: Input Digital Volume Control Mode Select
0: Independent
1: Dependent (default)
When IVOLC bit = “1”, IVL7-0 bits control both Lch and Rch volume level, while register values of IVL7-0
bits are not written to IVR7-0 bits. When IVOLC bit = “0”, IVL7-0 bits control Lch level and IVR7-0 bits
control Rch level, respectively.
DVOLC: Output Digital Volume Control Mode Select
0: Independent
1: Dependent (default)
When DVOLC bit = “1”, DVL7-0 bits control both Lch and Rch volume level, while register values of
DVL7-0 bits are not written to DVR7-0 bits. When DVOLC bit = “0”, DVL7-0 bits control Lch level and
DVR7-0 bits control Rch level, respectively.
LOPS: Stereo Line Output Power-Save Mode
0: Normal Operation (default)
1: Power-Save Mode
LVOL2-0: Stereo Line Output Gain Select (Table 44)
Default: “000” (0dB)
MS0672-E-00
- 70 -
2007/11