AK4691 Datasheet, PDF (65/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

[AK4691]
■ Register Definitions
Addr
00H
Register Name
Power Management 1
R/W
Default
D7
PMMP
R/W
0
D6
PMMICR2
R/W
0
D5
PMMICL2
R/W
0
D4
PMMICR1
R/W
0
D3
PMMICL1
R/W
0
D2
PMADC2
R/W
0
D1
PMADC1
R/W
0
D0
PMVCM
R/W
0
PMVCM: VCOM and LVCM Power Management
0: Power-down (default)
1: Power-up
When any blocks are powered-up, the PMVCM bit must be set to “1”. PMVCM bit can be set to “0” only
when all power management bits of 00H and 01H, PMPLL and MCKO bits are “0”.
PMADC1: ADC1 Power Management
0: Power-down (default)
1: Power-up
PMADC2: ADC2 Power Management
0: Power-down (default)
1: Power-up
When the PMADC1 or PMADC2 bit is changed from “0” to “1”, the initialization cycle (1059/fs=22.1ms
@48kHz) starts. After initializing, digital data of the ADC is output.
PMMICL1: Lch Pre-Amp #1 Power Management
0: Power-down (default)
1: Power-up
PMMICR1: Rch Pre-Amp #1 Power Management
0: Power-down (default)
1: Power-up
PMMICL2: Lch Pre-Amp #2 Power Management
0: Power-down (default)
1: Power-up
PMMICR2: Rch Pre-Amp #2 Power Management
0: Power-down (default)
1: Power-up
PMMP: MPWR pin Power Management
0: Power-down. Pull-down to VSS1 with 5.3kΩ (typ.) (default)
1: Power-up
MS0672-E-00
- 65 -
2007/11