AK4691 Datasheet, PDF (41/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

[AK4691]
2. ALC Recovery Operation
The ALC recovery operation waits for the WTM2-0 bits (Table 29) to be set after completing the ALC limiter operation.
If the input signal does not exceed “ALC recovery waiting counter reset level” (Table 26) during the wait time, the ALC
recovery operation is executed. The IVL and IVR values are automatically incremented by RGAIN1-0 bits (Table 30) up
to the set reference level (Table 31) with zero crossing detection which timeout period is set by ZTM1-0 bits (Table 28).
Then the IVL and IVR are set to the same value for both channels. The ALC recovery operation period is set by WTM2-0
bits. When zero cross is detected at both channels during the wait period set by WTM2-0 bits, the ALC recovery operation
waits until WTM2-0 period and the next recovery operation is executed.
For example, when the current IVOL value is 30H and RGAIN1-0 bits are set to “01”, IVOL is changed to 32H by the
auto limiter operation and then the input signal level is gained by 0.75dB (=0.375dB x 2). When the IVOL value exceeds
the reference level (REF7-0 bits), the IVOL values are not increased.
When
“ALC recovery waiting counter reset level (LMTH1-0) ≤ Output Signal < ALC limiter detection level (LMTH1-0)”
during the ALC recovery operation, the waiting timer of ALC recovery operation is reset. When
“ALC recovery waiting counter reset level (LMTH1-0) > Output Signal”,
the waiting timer of ALC recovery operation starts.
The ALC operation corresponds to the impulse noise. When the impulse noise is input, the ALC recovery operation
becomes faster than a normal recovery operation (Fast Recovery Operation). When large noise is input to microphone
instantaneously, the quality of small signal level in the large noise can be improved by this fast recovery operation. The
speed of fast recovery operation is set by RFST1-0 bits (Table 32).
WTM2
bit
0
0
0
0
1
1
1
1
WTM1
bit
0
0
1
1
0
0
1
1
WTM0
ALC Recovery Operation Waiting Period
bit
8kHz
32kHz
48kHz
0
128/fs
16ms
4ms
2.7ms
1
256/fs
32ms
8ms
5.3ms
0
512/fs
64ms
16ms
10.7ms
1
1024/fs
128ms
32ms
21.3ms
0
2048/fs
256ms
64ms
42.7ms
1
4096/fs
512ms
128ms
85.3ms
0
8192/fs
1024ms
256ms
170.7ms
1
16384/fs
2048ms
512ms
341.3ms
Table 29. ALC Recovery Operation Waiting Period
(default)
RGAIN1 bit
0
0
1
1
RGAIN0 bit
GAIN STEP
0
1 step
0.375dB
1
2 step
0.750dB
0
3 step
1.125dB
1
4 step
1.500dB
Table 30. ALC Recovery GAIN Step
(default)
MS0672-E-00
- 41 -
2007/11