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AK4691 Datasheet, PDF (51/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP
[AK4691]
■ Analog Mixing: Mono Input
When the PMBP bit is set to “1”, the mono input is powered-up. When the BEEPS bit is set to “1”, the input signal from
the BEEP pin is output to Speaker-Amp. When the BEEPH bit is set to “1”, the input signal from the BEEP pin is output
to Headphone-Amp. When the BEEPL bit is set to “1”, the input signal from the BEEP pin is output to the stereo line
output amplifier. The external resister Ri adjusts the signal level of BEEP input. Table 41, Table 42 and Table 43 show the
typical gain example at Ri = 20kΩ. This gain is in inverse proportion to Ri .
Signal
Ri
BEEP pin
BEEPL bit
BEEPH bit
BEEPS bit
LOUT/ROUT pin
HPL/HPR pin
SPP/SPN pin
Figure 32. Block Diagram of BEEP pin
LVOL2 bit LVOL1 bit LVOL0 bit
BEEP Æ LOUT/ROUT
0
0
0
0dB
(default)
0
0
1
+2dB
0
1
0
+5.9dB
0
1
1
+6.5dB
1
0
0
+7.1dB
1
0
1
N/A
1
1
x
N/A
Table 41. BEEP Input Æ LOUT/ROUT Output Gain (typ) at Ri = 20kΩ (N/A: Not available)
HPG bit
BEEP Æ HPL/HPR
0
−20dB
(default)
1
−16.4dB
Table 42. BEEP Input Æ Headphone-Amp Output Gain (typ) at Ri = 20kΩ
SPKG1-0 bits
BEEP Æ SPP/SPN
ALC bit = “0”
ALC bit = “1”
00
+4.43dB
+6.43dB
(default)
01
+6.43dB
+8.43dB
10
+10.65dB
+12.65dB
11
+12.65dB
+14.65dB
Table 43. BEEP Input Æ Speaker-Amp Output Gain (typ) at Ri = 20kΩ
MS0672-E-00
- 51 -
2007/11