AK4691 Datasheet, PDF (33/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

[AK4691]
2. MIX-Amp
MIX1-Amp is powered-up when PMADC1 bit = “1”. MIX-Amp mixes the MIC input and the line input. Mixing ratio
is “1:0.6” at FB bit = “0” and “1.67:1” at FB bit = “1”.
3. Polarity
INTL1/INTR1, INTL2/INTR2, EXTL1/EXTR1, EXTL2/EXTR2, and LIN/RIN pins output non-inverted input signals
from ADC.
Signal Path
INTL1/INTR1 Æ ADC1
INTL2/INTR2 Æ ADC2
EXTL2/EXTR2 Æ ADC1
EXTL2/EXTR2 Æ ADC2
LIN/RIN Æ ADC1
Polarity
Non-inverted
Non-inverted
Non-inverted
Table 20. Polarity of Recording Block
4. Mono Analog Loopback Selector
When Pre-Amp gain is +18dB, +20dB, +24dB or +28dB, signal from Lch Pre-Amp #1 (MICL1 bit), Rch Pre-Amp #1
(MICR1 bit), and Lch Pre-Amp #2 (MICL2 bit) can be output from the LOUT pin. This path does not pass through the
block of MIC sensitivity compensation. MICL1 bit is enabled at PMMICL1 = PMLO bits = “1”. MICR1 bit is enabled
at PMMICR1 = PMLO bits = “1”. MICL2 bit is enabled at PMMICL2 = PMLO bits = “1”.
From Lch Pre-Amp #1
From Rch Pre-Amp #1
MICL1 bit
MICR1 bit
To LOUT
From Lch Pre-Amp #2
MICL2 bit
Figure 24. Mono Analog Loopback Selector
5. MONO Mode
ADC1 and ADC2 support mono data output. The both output mode of ADC1 and ADC2 are selected by ADM1-0 bits.
This conversion to mono data from stereo data is done before window noise reduction circuit (Figure 25).
ADM1 bit
0
0
1
1
ADM0 bit
ADC output
Lch
Rch
0
Lch Data
Rch Data
1
Lch Data
Lch Data
0
Rch Data
Rch Data
1
(L+R)/2
(L+R)/2
Table 21. ADC output data
(default)
After setting ADM1-0 bits, ADC should be power-up by setting PMADC1 bit = “1” or PMADC2 bit = “1”. When
changing ADM1-0 bits during ADC is working, the pop noise may occur.
MS0672-E-00
- 33 -
2007/11