AK4691 Datasheet, PDF (18/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

MCKI
LRCK
BICK
1/fCLK
tCLKH
tCLKL
1/fs
tLRCKH
tLRCKL
tBCK
tBCKH
tBCKL
fMCK
VIH1
VIL1
VIH1
VIL1
Duty = tLRCKH x fs x 100
= tLRCKL x fs x 100
VIH1
VIL1
MCKO
50%TVDD1
tMCKL
dMCK = tMCKL x fMCK x 100
Figure 5. Clock Timing (PLL Slave mode; PLL Reference Clock = MCKI pin)
MCKI
LRCK
BICK
1/fCLK
tCLKH
tCLKL
VIH1
VIL1
1/fs
tLRCKH
tLRCKL
tBCK
VIH1
VIL1
Duty = tLRCKH x fs x 100
tLRCKL x fs x 100
tBCKH
tBCKL
VIH1
VIL1
Figure 6. Clock Timing (EXT Slave mode)
[AK4691]
MS0672-E-00
- 18 -
2007/11