AK4691 Datasheet, PDF (67/80 Pages) Asahi Kasei Microsystems – 4ch ADC + 2ch DAC with MIC/HP/SPK-AMP

[AK4691]
Addr
02H
Register Name
Mode Control 1
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
0
0
BCKO
M/S
PS1
PS0
MCKO PMPLL
RD
RD
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
PMPLL: PLL Power Management
0: EXT Mode and Power-Down (default)
1: PLL Mode and Power-up
MCKO: Master Clock Output Enable
0: Disable: MCKO pin = “L” (default)
1: Enable: Output frequency is selected by PS1-0 bits.
PS1-0: MCKO Output Frequency Select (Table 9)
Default: “00” (256fs)
M/S: Master / Slave Mode Select
0: Slave Mode (default)
1: Master Mode
BCKO: BICK Output Frequency Select at Master Mode (Table 10)
Default: “0” (32fs)
Addr
03H
Register Name
Mode Control 2
R/W
Default
D7
D6
D5
D4
D3
D2
D1
D0
PLL3 PLL2 PLL1 PLL0 FS3
FS2
FS1
FS0
R/W R/W
R/W
R/W R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
FS3-0: Sampling Frequency Select (Table 5, Table 6.) and MCKI Frequency Select (Table 11)
FS3-0 bits select sampling frequency at PLL mode and MCKI frequency at EXT mode.
PLL3-0: PLL Reference Clock Select (Table 4)
Default: “0000”(LRCK pin)
Addr
04H
Register Name
Mode Control 3
R/W
Default
D7
ADM1
R/W
0
D6
ADM0
R/W
0
D5
D4
D3
D2
D1
0
INITDA LMODE HPFN DIF1
RD
R/W
R/W
R/W
R/W
0
0
0
0
1
D0
DIF0
R/W
0
DIF1-0: Audio Interface Format (Table 13)
Default: “10” (Left justified)
HPFN: HPF Control on DAC
0: Enable (default)
1: Disable
LMODE: Select power-save mode of stereo line output (Table 45, Table 47)
INITDA: DAC Initialization Cycle Enable
0: Enable (Initialization Cycle= 1059/fs) (default)
1: Disable
ADM1-0: ADC Mono Mode (Table 21)
Default: “00” (Stereo Output)
MS0672-E-00
- 67 -
2007/11