AK8140A Datasheet, PDF (6/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator

AK8140A
Device Characteristics
over VDD1-4: 3.0 to 3.6V, VDDO1-2:1.7 to 3.6V, Ta: -40 to +85℃, unless otherwise noted
Parameter
Overall Parameter
Symbol
Conditions
MIN
TYP
MAX Unit
High Level Input Voltage
Pin:S0, PD_N, S1/SCL,
VIH
S2/SDA, XIN
0.7*VDD
VDD
V
Low Level Input Voltage
Input Leak Current 1
Input Leak Current 2
Input Leak Current 3
Current Consumption 1
Current Consumption 2
Power Down mode
Current Consumption
Pin:S0, PD_N, S1/SCL,
VIL
S2/SDA, XIN
IL1 Pin:S0, PD_N, VIN
IL2 Pin:S2/SCL
IL3 Pin:S1/SDA
No load, all outputs on,
with setting:
IDD1
XIN input freq:100MHz
CLK1-3:160MHz
CLK4: 230MHz
No load, all outputs OFF,
with setting:
IDD2
XIN input freq:100MHz
CLK1, 2, 3: “L” output
CLK4: “L” output
No load, Power Down mode,
SIDD
PD_N pin =’L’
VSS
-1
-1
-20
0.3*VDD V
+1
A
+20 A
+1
A
58
mA
15
mA
0.5
A
Crystal Clock Frequency
External Clock Input
Frequency
External Clock Input
Duty Cycle
Output Clock Frequency
Accuracy ⁽¹⁾
Output Lock Time ⁽²⁾
Fosc
Pin: XI, XO
16
Fin
Pin: XI
When input external input.
4
Pin: XI
Findc
When input external input.
30
at 1/2*VDD
Faccuracy
-30
Tlock
Pin:CLK1-4
60 MHz
100 MHz
50
70 %
+30 ppm
3
ms
Note
(1) Additional value through IC. This value is guaranteed only when using AKM’s suggested crystal unit on
page 42.
(2) Time to settle output into 0.1% of specified frequency from the point that PD_N pin is changed “0” to “1”.
Sep -12
draft-E-06
-6-