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AK8140A Datasheet, PDF (40/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator | |||
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AK8140A
âAddressï¼32hï½34hã36hï½38h NDIV2 Dividing Value
*n=0/1
Address D7
D6
D5
Data
D4
D3
32h
36h
NINTn[5] NINTn[4] NINTn[3] NINTn[2] NINTn[1]
33h
37h
NUMEn[6] NUMEn[5] NUMEn[4] NUMEn[3] NUMEn[2]
34h
38h
DENOn[7] DENOn[6] DENOn[5] DENOn[4] DENOn[3]
After writing register 34h, 32hï½34h data settings are updated.
After writing register 38h, 36hï½38h data settings are updated.
D2
NINTn[0]
NUMEn[1]
DENOn[2]
D1
NUMEn[8]
NUMEn[0]
DENOn[1]
D0
NUMEn[7]
DENOn[8]
DENOn[0]
NDIV2 Dividing Value ï¼NINTnï¼ NUMEnï¼ DENOnï¼
NDIV2 dividing value can be set according to Frequency Setting Procedure on page 10.
NINTn[5:0] ï¼ NDIV2 integral part settings
NINTn[5:0]
000000 ï½
001111
010000
ï¼
100011
100100
100101
ï¼
111001
111010 ï½
111111
*n=0/1
NDIV2 Integral Part
prohibited
16
ï¼
35
36
37
ï¼
57
prohibited
NUMEn[8:0] ï¼ NDIV2 Numerator of fractional part setting
*n=0/1
NUMEn[8:0]
000000000
000000001
ï¼
111111110
111111111
NDIV2 Numerator of
fractional part setting
0ï¼fractional-part=0ï¼
1
ï¼
510
511
Sep -12
- 40 -
draft-E-06
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