AK8140A Datasheet, PDF (5/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator

AK8140A
Absolute Maximum Rating
Over operating free-air temperature range unless otherwise noted ⁽¹⁾
Items
Symbol
Ratings
Unit
Supply voltage
VDD
-0.3 to 4.6
V
Input voltage
VIN
VSS-0.3 to VDD+0.3
V
Input current (any pins except supplies)
IIN
±10
mA
Storage temperature
Tstg
-55 to 130
C
Note
(1) Stress beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only. Functional operation of the device at these or any other conditions beyond those
indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rating
conditions for extended periods may affect device reliability. Electrical parameters are guaranteed only over the
recommended operating temperature range.
ESD Sensitive Device
This device is manufactured on a CMOS process, therefore, generically susceptible to
damage by excessive static voltage. Failure to observe proper handling and
installation procedures can cause damage. AKM recommends that this device is handled with
appropriate precautions.
Recommended Operation Conditions
Parameter
Symbol
Conditions
Min
Typ Max Unit
Operating temperature
Ta
-40
85 C
VDD Pin: VDD1-4
3.0
3.3
3.6
Supply voltage⁽¹⁾
Pin：VDDO1
VDDO１ _{Supply voltage for CLK1/2 output}
1.7
3.0
buffer
Pin：VDDO2
1.7
VDDO2 _{Supply voltage for CLK3/4 output}
2.3
buffer
3.0
Pin:CLK1,2,3
Output frequency: up to 50MHz
Pin:CLK1,2,3
Output Load Capacitance⁽²⁾ Cplclk ^{Output frequency: 50M to 120MHz}
Pin:CLK1,2,3
Output frequency: 120M to 160MHz
1.8
1.9
3.3
3.6 _V
1.8
1.9
2.5
2.7
3.3
3.6
25
15
pF
10
Pin:CLK4 LVCMOS output
10
Output frequency: up to 160MHz
Note:
(1) Power to VDD1-4 requires to be supplied from a single source. A decoupling capacitor for power supply line
should be installed close to each VDD pin.
(2) Output load capacitance for CLK4p/n pin at LVDS output is descripted on page 9 for details.
draft-E-06
-5-
Sep -12