AK8140A Datasheet, PDF (18/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator

AK8140A
Random read
Random read operation is described below. It is necessary to operate “dummy write” before sending
read command. Dummy write is to send the address to read. It is possible to read next address
sequentially by sending ACK instead of stop condition.
SDA
Random read
S
T
A ^Slave
R ^Address
T
S
T
W ord
A ^Slave
Address(n) _R Address
T
Data(n)
S
S
A1 W A
C
K
A
A1 R A
C
C
K
K
Data(n+1)
A
A
C
C
K
K
S
Data(n+x) ^T
O
P
P
Change data
Change data operation is described below. It is available when SCL is Low.
Change data
SCL
SDA
DATA STABLE
DATA
CHANGE
Start / Stop timing
Start / Stop timing is described below. The sequence is started when SDA goes from high to low
during SCL is high. The sequence is stopped when SDA goes from low to high during SCL is high.
Start / Stop timing
SCL
SDA
START
STOP
Sep -12
- 18 -
draft-E-06