AK8140A Datasheet, PDF(14/45 Page) Asahi Kasei Microsystems

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AK8140A Datasheet, PDF (14/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator

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AK8140A

ï¬ Programmable control pin setting

AK8140A has three user-definable control terminals (S0, S1, and S2) which allow external

control of device settings. The user can define up to eight different control settings shown in Table.

They can be programmed to any of the following functions:

-PLL1/2 frequency:

select from two variation of fVCO frequency set by the applicable register.

-CLK1-4 output state:

select from four states: enable/Hi-z/disable to L/ disable to H.

Programmable

Control Pin

S2 S1 S0

000

001

010

011

100

101

110

111

Address Offset

PLL1

PLL2

frequency frequency

CLK1

Output

State

CLK2

Output

State

CLK3

Output

State

CLK4

Output

State

PLL1_0 or PLL2_0 or Enable or Enable or Enable or Enable or