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AK8140A Datasheet, PDF (39/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator | |||
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AK8140A
âAddressï¼31h/35h
Address D7
MDIV2 and fVCO2 frequency range Setting
Data
D6
D5
D4
D3
D2
*n=0/1
D1
D0
31h
35h
Reserved Reserved MDIVn[2] MDIVn[1] MDIVn[0] VCO2_RANGEn[1] VCO2_RANGEn[0] ï¼
MDIVn[2:0] ï¼MDIV2Dividing Value Settings
*n=0/1
MDIV1Configuration is as the following Figure.
MDIV1 Dividing Value can be set according to Frequency Setting Procedure on page 10.
MDIV2
XIN input
å
Phase
Comparator
Figure MDIV2 configuration
MDIVn[2:0]
MDIVn[2:0]
000
001
010
011
100
Except
the above
MDIV2 Dividing Value
1
2
4
8
16
prohibited
ï¼Device is Reseï½ï¼
VCO2_RANGEn[1:0] ï¼ fVCO2 range selection *n=0/1
âVCO2_RANGEn[1:0]â selects the fVCO2 frequency range. fVCO2 frequency can be set
according to Frequency Setting Procedure on page 10.
VCO2_RANGEn[1:0]
00
01
10
11
fVCO2 range
fvco < 117.5MHz
117.5MHz <= fvco <
155MHz
155MHz <= fvco <
192.5MHz
192.5MHz <= fvco
draft-E-06
- 39 -
Sep -12
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