AK8140A Datasheet, PDF (3/45 Pages) Asahi Kasei Microsystems – Programmable Clock Generator

Pin Descriptions
XIN
1
XOUT
2
VDD1
3
VSS1
4
GND
5
S0
6
VSS2
7
VDD2
8
VDD3
9
VSS3
10
VSS4
11
VDD4
12
AK8140A
24
S1/SCL
23
S2/SDA
22
CLK3
21
VSSO2
20
VDDO2
19
CLK4n
18
CLK4p
17
PD_N
16
CLK2
15
VDDO1
14
VSSO1
13
CLK1
Figure 2: AK8140A Programmable Clock Generator
24-Pin ETSSOP (Top View)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Pin Name
XIN
XOUT
VDD1
VSS1
GND
S0
VSS2
VDD2
VDD3
VSS3
VSS4
VDD4
CLK1
VSSO1
VDDO1
CLK2
PD_N
Pin Type
AI
AO
PWR
PWR
AI
AO
PWR
PWR
Description
Crystal connection or External Clock signal input
Crystal connection
Please leave open when external clock signal input.
Device power supply
Ground
Connect to Ground
Programmable Control Pin0
Ground
Device power supply
PWR Device power supply
PWR _Ground
PWR Ground
PWR Device power supply
DIO LVCMOS output pin1
PWR
PWR
DO
DI
Ground for output buffer.
Output Buffer power supply1
Voltage supply for CLK1 and CLK2
LVCMOS output pin2
Power Down control pin
L：Device is powered down, all outputs are low.
H：output Clock and PLL is normal operation.
draft-E-06
-3-
Sep -12