Z89323 Datasheet, PDF (54/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

TIMING DIAGRAMS
CLOCK
/DS
DSVALID
PRELIMINARY
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
TCY
DSHOLD
Tr
Tf
CPW
EA(2:0)
EASET
Valid Address Out
EAHOLD
RD//WR
EXT(15:0)
CLOCK
WAIT
/DS
EA(2:0)
RD//WR
EXT(15:0)
RDHOLD
RDSET
Data In
Figure 42. Read Timing
TCY
WSET
WHOLD
Valid Address Out
Data In
Figure 43. Read Timing Using WAIT Pin
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DS95DSP0101 Q4/95