Z89323 Datasheet, PDF (41/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

INSTRUCTION FORMAT
PRELIMINARY
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
Table 13. Registers
Source/Destination
Register
0000
0001
0010
0011
BUS^[1]
X
Y
A
0100
0101
0110
0111
SR
STACK
PC
P^[1]
1000
1001
1010
1011
EXT0
EXT1
EXT2
EXT3
1100
1101
1110
1111
EXT4
EXT5
EXT6
EXT7
Table 14. Register Pointers Field
Source/Destination
Meaning
00xx
01xx
10xx
11xx
NOP
+1
–1/LOOP
+1/LOOP
xx00
xx01
xx10
xx11
P0:0 or P0:1^[2]
P1:0 or P1:1^[2]
P2:0 or P2:1^[2]
Short Form Direct Mode^[3]
Notes:
[1] If RAM Bank bit is 0, then Pn:0 are selected.
If RAM Bank bit is 1, then Pn:1 are selected.
[2] Read only.
[3] When the short form direct mode is selected,
00000-01111 or 10000-11111 are used as RAM addresses.
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Note: Source/Destination fields can specify either register
or RAM address in RAM pointer indirect mode.
Figure 35. General Instruction Format
Source field
Destination field
RAM Bank selection
Opcode
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Figure 36. Short Immediate Data Load Format
Short Immediate Data
Reg. Pointer
0 0 0 P0:0
0 0 1 P1:0
0 1 0 P2:0
0 1 1 NA
1 0 0 P0:1
1 0 1 P1:1
1 1 0 P2:1
1 1 1 NA
Opcode
00011
DS95DSP0101 Q4/95
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