Z89323 Datasheet, PDF (13/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

REGISTERS
PRELIMINARY
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
The internal registers of the Z89323/373/393 are defined
below:
Register Register Definition
P
Output of Multiplier, 24-bit
X
X Multiplier Input, 16-bit
Y
Y Multiplier Input, 16-bit
A
Accumulator, 24-bit
SR
Pn:b
PC
Status Register, 16-bit
Six Ram Address Pointers, 8-bit each
Program Counter, 16-bit
EXT 0
EXT 1
EXT 2
EXT 3
EXT 4
EXT 5
EXT 6
EXT 7
See Table 6 and Table 7 for the different assignments of
EXT7-EXT0 in the different banks.
Register
EXTn
BUS
Dn:b
Register Definition
External Registers, 16-bit
D-Bus
Eight Data Pointers*
Note:
* These data pointers occupy the first four locations in RAM bank.
P holds the result of multiplications and is read-only.
X and Y are two 16-bit input registers for the multiplier.
These registers can be utilized as temporary registers
when the multiplier is not being used.
A is a 24-bit Accumulator. The output of the ALU is sent to
this register. When 16-bit data is transferred into this
register, it is placed into the 16 MSBs and the least
significant eight bits are set to zero. Only the upper 16 bits
are transferred to the destination register when the
Accumulator is selected as a source register in transfer
instructions.
Pn:b are the pointer registers for accessing data RAM, (n
= 0,1,2 refer to the pointer number) (b = 0,1 refers to RAM
Bank 0 or 1). They can be directly read from or written to,
and can point to locations in data RAM or Program Memory.
EXTn are external registers (n = 0 to 7). There are eight 16-
bit registers provided here for mapping external devices
into the address space of the processor. Note that the
actual register RAM does not exist on the chip, but would
exist as part of the internal or external device, such as an
ADC.
BUS is a read-only register which, when accessed, returns
the contents of the D-Bus. Bus is used for emulation only.
Dn:b refers to locations in RAM that can be used as a
pointer to locations in program memory which is efficient
for coefficient addressing. The programmer decides which
location to choose from two bits in the status register and
two bits in the operand. Thus, only the lower 16 possible
locations in RAM can be specified. At any one time, there
are eight usable pointers, four per bank, and the four
pointers are in consecutive locations in RAM. For example,
if S3/S4 = 01 in the status register, then D0:0/D1:0/D2:0/
D3:0 refer to register locations 4/5/6/7 in RAM Bank 0. Note
that when the data pointers are being written to, a number
is actually being loaded to Data RAM, so they can be used
as a limited method for writing to RAM.
SR is the status register (Figure 8) which contains the ALU
status and certain control bits (Table 5).
Table 5. Status Register Bit Functions
Status Register Bit
Function
S15 (N)
S14 (OV)
S13 (Z)
S12 (L)
S11 (UI1)
S10 (UI0)
ALU Negative
ALU Overflow
ALU Zero
Carry
User Input 1
User Input 0
S9 (SH3)
S8 (OP)
S7 (IE)
S6 (UO1)
S5 (UO0)
S4-S3
S2-S0 (RPL)
MPY Output Arithmetically
Shifted Right by three bits
Overflow Protection
Interrupt Enable
User Output 1
User Output 0
“Short Form Direct” bits
RAM Pointer Loop Size
DS95DSP0101 Q4/95
13