Z89323 Datasheet, PDF (17/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

PRELIMINARY
Bank15/EXT3 Reg
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
Bits 1 - 0 = Wait-State EXT0
Bits 3 - 2 = Wait-State EXT1
Bits 5 - 4 = Wait-State EXT2
Bits 7 - 6 = Wait-State EXT3
Bits 9 - 8 = Wait-State EXT4
Bits 11 -10 = Wait-State EXT5
Bits 13 -12 = Wait-State EXT6
Bit14 = Reserved
Bit 15 = Test Mode
0 Normal Operation (default)
1 Test Mode: Bits 6-5 of the
Status Register drives,
P23 and P22, respectively
(VO0 and VO1).
Figure 8a. Bank 15/EXT3 Register
DS95DSP0101 Q4/95
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