Z89323 Datasheet, PDF (48/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

PRELIMINARY
INSTRUCTION DESCRIPTIONS (Continued)
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
Inst. Description
MPYS Multiplyand
subtract
Synopsis
Operands
Words Cycles Examples
MPYS<src1>,<src2>[,<bank switch>]
<hwregs>,<regind>
1
<hwregs>,<regind>,<bankswitch> 1
<regind>,<regind>
1
<regind>,<regind>,<bankswitch> 1
1 MPYSA,@P0:0
1 MPYSA,@P1:0,OFF
1 MPYS@P1:1,@P2:0
1 MPYS@P0:1,@P1:0,ON
NEG Negate
NOP Nooperation
OR BitwiseOR
NEG<cc>,A
NOP
OR <dest>,<src>
POP Popvalue
from stack
PUSH Pushvalue
onto stack
POP <dest>
PUSH <src>
RET Returnfromsubroutine RET
RL RotateLeft
RL <cc>,A
RR RotateRight
RR <cc>,A
Note: Ifsrc1is<regind>itmustbeabank1register.Src2’s<regind>mustbe
a bank 0 register.
Note: <hwregs>forsrc1cannotbeX.
Note: Fortheoperands<hwregs>,<regind>the<bankswitch>defaultstoOFF.
For the operands <regind>, <regind> the <bank switch> defaults to ON.
<cc>, A
A
1 1 NEGMI,A
1 1 NEGA
None
1 1 NOP
A, <pregs>
A, <dregs>
A, <limm>
A, <memind>
A, <direct>
A, <regind>
A, <hwregs>
A, <simm>
1 1 ORA,P0:1
1 1 ORA,D0:1
2 2 ORA,#%2C21
1 3 ORA,@@P2:1+
1 1 ORA,%2C
1 1 ORA,@P1:0–LOOP
1 1 ORA,EXT6
OR A,#%12
<pregs>
<dregs>
<regind>
<hwregs>
1 1 POPP0:0
1 1 POPD0:1
1 1 POP@P0:0
1 1 POPA
<pregs>
<dregs>
<regind>
<hwregs>
<limm>
<accind>
<memind>
1 1 PUSHP0:0
1 1 PUSHD0:1
1 1 PUSH@P0:0
1 1 PUSHBUS
2 2 PUSH#12345
1 3 PUSH@A
1 3 PUSH@@P0:0
None
1 2 RET
<cc>,A
A
1 1 RLNZ,A
1 1 RLA
<cc>,A
A
1 1 RRC,A
1 1 RRA
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DS95DSP0101 Q4/95