Z89323 Datasheet, PDF (2/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

PRELIMINARY
GENERAL DESCRIPTION (Continued)
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
The Z893X3 DSP family is 100 percent source and object-
code compatible with the existing Z89321/371/391 devices,
providing users, who can benefit from increased integration
and reduced system cost, an easy migration path from one
DSP product to the next.
Throughout this specification, references to the Z89323
device applies equally to the Z89373 and Z89393, unless
otherwise specified.
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.,
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
Connection
Circuit
Device
Power
V
V
CC
DD
Ground
GND
V_SS
PD0-15
PA0-15
/PAZ
PDATA
PADDR
HALT
/ROMEN
/RES
CLKI
CLKO
AGND
ANVCC
VALO
VALI
VSS
VDD
Program
Control
Unit
Program
ROM/OTP
8192x16
Data RAM0
256x16
Data RAM1
256x16
DDATA
XDATA
X
Y
Multiplier
P
Shifter
P0
P1
P2
DP0-3
P0
P1
P2
DP4-6
ADDR ADDR
GEN0 GEN1
Arithmetic
Logic Unit
(ALU)
Accumulator
16-Bit Timer,
Counter
16-Bit Timer,
Counter, PWM
16-Bit Timer,
Counter, PWM
SPI
16-Bit
Program
I/O
8-Bit
A/D
8-Bit I/O
8-Bit I/O
4 Inputs
4 Outputs
Port 0
/EXTEN
EA0-2
EXT0-15/P00-15
/DS
WAIT
RD//WR
AN0
AN1
AN2
AN3
Port 1
P10-17
or
INT2
CLKOUT
SIN
SOUT
SK
SS
UI0-1
Port 2
P20-27
or
UI2
UO0-2
INT0-1
Port 3
P30-33
P34-37
Figure 1. Z893X3 Functional Block Diagram
2
DS95DSP0101 Q4/95