Z89323 Datasheet, PDF (46/61 Pages) Zilog, Inc. – 16-BIT DIGITAL SIGNAL PROCESSORS

PRELIMINARY
INSTRUCTION DESCRIPTIONS
Z89323/373/393
16-BIT DIGITAL SIGNAL PROCESSORS
Inst.
Description
ABS
Absolute Value
ADD
Addition
Synopsis
ABS[<cc>,]<src>
ADD<dest>,<src>
AND
Bitwise AND
AND<dest>,<src>
CALL
Subroutine call
CCF
CIEF
COPF
CP
Clear carry flag
Clear Carry Flag
Clear OP flag
Comparison
CALL [<cc>,]<address>
CCF
CIEF
COPF
CP<src1>,<src2>
DEC
Decrement
INC
Increment
JP
Jump
DEC [<cc>,]<dest>
INC [<cc>,] <dest>
JP [<cc>,]<address>
Operands
<cc>,A
A
A,<pregs>
A,<dregs>
A,<limm>
A,<memind>
A,<direct>
A,<regind>
A,<hwregs>
A, <simm>
A,<pregs>
A,<dregs>
A,<limm>
A,<memind>
A,<direct>
A,<regind>
A,<hwregs>
A, <simm>
<cc>,<direct>
<direct>
None
None
None
A,<pregs>
A,<dregs>
A,<memind>
A,<direct>
A,<regind>
A,<hwregs>
A<limm>
A, <simm>
<cc>A,
A
<cc>,A
A
<cc>,<direct>
<direct>
Words
1
1
1
1
2
1
1
1
1
Cycles
1
1
1
1
2
3
1
1
1
1
1
1
1
2
2
1
3
1
1
1
1
1
1
2
2
2
2
1
1
1
1
1
1
1
1
1
1
1
3
1
1
1
1
1
1
2
2
1
1
1
1
1
1
1
1
2
2
2
2
Examples
ABSNC,A
ABSA
ADD A,P0:0
ADD A,D0:0
ADD A,#%1234
ADDA,@@P0:0
ADD A,%F2
ADD A,@P1:1
ADD A,X
ADD A, #%12
AND A,P2:0
AND A,D0:1
AND A,#%1234
ANDA,@@P1:0
AND A,%2C
ANDA,@P1:2+LOOP
ANDA,EXT3
AND A, #%12
CALL Z,sub2
CALL sub1
CCF
CIEF
COPF
CP A,P0:0
CP A,D3:1
CP A,@@P0:1
CP A,%FF
CP A,@P2:1+
CPA,STACK
CP A,#%FFCF
CP A, #%12
DECNZ,A
DECA
INC PL,A
INC A
JP NIE,Label
JP Label
46
DS95DSP0101 Q4/95