W83791G Datasheet, PDF (69/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
7.83 FAN 4 Duty Cycle Select Register—A0h (Bank 0)
Power on default: FFh
BIT
NAME
ATTRIBUTE
DESCRIPTION
7-0 F4_DC[7:0] R/W
Fan 4 Duty Cycle. This 8-bit register determines the number
of input clock cycles, out of 256-cycle period, during which the
PWM output is high. During smart fan3 control mode, read this
register would return smart fan duty cycle.
00h: PWM output is always logical Low.
FFh: PWM output is always logical High.
XXh: PWM output logical High percentage is (XX/256*100%)
during one cycle.
7.84 FAN 5 Duty Cycle Select Register—A1h (Bank 0)
Power on default: FFh
BIT
NAME
ATTRIBUTE
DESCRIPTION
7-0 F5_DC[7:0] R/W
Fan 5 Duty Cycle. This 8-bit register determines the number
of input clock cycles, out of 256-cycle period, during which the
PWM output is high. During smart fan3 control mode, read this
register would return smart fan duty cycle.
00h: PWM output is always logical Low.
FFh: PWM output is always logical High.
XXh: PWM output logical High percentage is (XX/256*100%)
during one cycle.
7.85 BEEP Control Register 3 ⎯ Index A3h (Bank 0)
Power on default: 00h ; Reset by MR.
BIT
NAME
ATTRIBUTE
DESCRIPTION
7
EN_USER_ R/W
BP
User defines BEEP output function. Write 1, the BEEP is
always active. Write 0, this function is inactive. (Default 0)
6
FAN5_BP R/W
Enable BEEP output from FAN5 Write 1; enable BEEP output.
Set 0 (default value), it will be disable BEEP tone output.
5
FAN4_BP R/W
Enable BEEP output from FAN4. Write 1; enable BEEP
output. Set 0 (default value), it will be disable BEEP tone
output.
4
EN_TART3 R/W
_BP
Enable BEEP output from Target temperature 3. Write 1;
enable BEEP output. Set 0 (default value), it will be disable
BEEP tone output.
3
EN_TART2 R/W
_BP
Enable BEEP output from Target temperature 2. Write 1;
enable BEEP output. Set 0 (default value), it will be disable
BEEP tone output.
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Publication Release Date: April 14, 2006
Revision 1.1