W83791G Datasheet, PDF (37/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
7.6 Speech Input Trigger Property Register ⎯ Index 0Ah (Bank 0)
Power on default: 00h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7 ^En_Program
6 En_Timeout
5 Busy
R/W
WO
RO
Enable W83791D to program external serial flash memory and
change GPIO pin to Speech mode pin.
Enable Software/Firmware Trigger Timeout Function. This
bit sets the Event Trigger Timeout Function in Index 08h.
If read this bit return “1” means SPKOUT is in busy.
4:0 EVNTRAP5-
1 Polarity
R/W
Write ‘0’ the EVNTRAP5-1 will positive edge trigger. Write ‘1’
will negative edge trigger.Default is ‘0’.
7.7 Reserved Register ⎯ Index 0Bh (Bank 0)
7.8 VID and VCORE voltage Property Register ⎯ Index 0Ch (Bank 0)
Power on default: 00h
BIT
NAME
7:1 Reserved
0 ^VRM_check
ATTRIBUTE
Read only
Reserved.
DESCRIPTION
If read 1, the power on VCORE checking will be according to
Intel VRM9.x . This bit is powered VSB.
7.9 Speech Flash Memory Read Data Registers ⎯ Index 0Dh-0Eh (Bank 0)
Power on default: 00h
INDEX
NAME
ATTRIBUTE
DESCRIPTION
0Dh
SPEECHRD0
RO
Speech Flash Read Data 0. Speech flash reading
data bits [7:0].
0Eh
SPEECHRD1
RO
Speech Flash Read Data 1. Speech flash reading
data bits [15:8].
7.10 Reserved Register ⎯ Index 0Fh (Bank 0)
7.11 VID Control/Status Register ⎯ Index 10h (Bank 0)
Power on default: 00h
BIT
NAME
ATTRIBUTE
7 ^EN_VIDOUT R/W
6:5 Reserved
4:0 ^VID_DATA R/W
DESCRIPTION
Enable VID Output.
Reserved.
VID Output Data. Read this register will return programmed
data of VID_DATA.
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Publication Release Date: April 14, 2006
Revision 1.1