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W83791G Datasheet, PDF (17/99 Pages) Winbond – Winbond H/W Monitoring IC
W83791D/G
6. FUNCTION DESCRIPTION
6.1 General Description
The W83791D/G provides 10 analog positive inputs, 5 fan speed inputs , at most 5 sets for fan PWM
(Pulse Width Modulation) control, 3 thermal inputs from remote thermistors, 2N3904 transistors or
PentiumTM II/III (Deschutes) thermal diode outputs, case open detection and beep function output
when the monitored values exceed preset ranges, including the voltage, temperature, and fan count.
Moreover, W83791D/G uniquely provides several innovative and practical functions to make the whole
system more efficient and compliant with future trend of network management, such as speech
function, ASF sensor compliant, SMBus 2.0 ARP command compatible, VID table selection trapping,
5VID output control, and so forth. Once the monitoring function of W83791D/G is enabled, the watch
dog machine will monitor every function and store the values to registers for comparison with preset
ranges. If the monitoring value exceeds the limit value, the interrupt status will be set to 1 and
W83791D/G will issue interrupt signals such as SMI# and IRQ if not masked..
6.2 Access Interface
The W83791D/G provides I2C Serial Bus for microprocessor to read/write internal registers. In the
W83791D/G, there are three serial bus addresses. Through the first address defined at CR [48h], all
the registers can be read and written except CPUT1/CPUT2 temperature sensor registers. The
read/write of the CPUT1/CPUT2 temperature sensor registers can be implemented through the
second address (defined at CR [4Ah] bit2-0) and the third address (defined at CR [4Ah] bit6-4).
The first serial bus address of W83791D/G has 2 hardware setting bits set by pin10-11. The address
is 001011[pin11], and [pin10]. Hence, the content of CR [48h] would be 00101110 if pin11=1 and
pin10=0.
6.2.1 The first serial bus access timing
(a) Serial bus writes to internal address register followed by the data byte
SCL
SDA
0
780
78
0
Start By
Master
10110
Frame 1
Serial Bus Address Byte
SCL (Continued)
SDA (Continued)
1 R/W
D7 D6 D5 D4 D3 D2 D1 D0
Ack
Ack
by
by
Frame 2
791D
791D
Internal Index Register Byte
0
78
D7 D6 D5 D4 D3 D2 D1 D0
Frame 3
Data Byte
Ack
by
79814DR
Stop
by
Master
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
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Publication Release Date: April 14, 2006
Revision 1.1