W83791G Datasheet, PDF (19/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
As BIOS usually has POST (Power On Self Test) program, then it will test every item step by step if no
failure takes place, however, if it detects a failure on a specific item, it will hang on there. Therefore,
BIOS could write timeout value to register 08h and start timer setup speech trigger event (register 09h),
then is BIOS test program started. Whenever the system is hang on specific item such as DRAM
testing, W83791D would say “DRAM test fails” after the timeout previously set at CR [08h]. On the
contrary, if DRAM test is ok, then BIOS could update the timeout value and proceed to the next test
program.
Below is the speech CPU_MODE table of W83791D/G:
CPU_MODE ITEM
DEFINITION
POI
Reserverd
SLOTOCC
CPU present or absent
EVNTRAP1(TG1)
Hardware trgger1
EVNTRAP2
Hardware trgger2
EVNTRAP3
Hardware trgger3
EVNTRAP4
Hardware trgger4
EVNTRAP5
Hardware trgger5
TRIGREG
I2C setting software trigger
IN0
Vcore(VIN0 ) exceed limit
IN1
VINR0(VIN1) exceed limit
IN2
(+3.3VIN)VIN2 exceed limit
IN3
(5VDD)VIN3 exceed limit
IN4
(+12VIN)VIN4 exceed limit
IN5
(-12VIN)VIN5 exceed limit
IN6
(-5VIN)VIN6 exceed limit
IN7
VSB(VIN7) exceed limit
IN8
VBAT(VIN8 ) exceed limit
IN9
(VINR1)VIN9 exceed limit
TEMP1
VTIN1 exceed limit
TEMP2
VTIN2 exceed limit
TEMP3
VTIN3 exceed limit
FAN1
FAN1 count over limit
FAN2
FAN2 count over limit
FAN3
FAN3 count over limit
CHS_EV
Case open trigger
Table 1 CPU_MODE
0,32
1
2
3
4
5
6
80-FF
40
41
42
43
44
45
46
47
48
49
4A
4B
4C
4D
4E
4F
50
VECTOR (H)
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Publication Release Date: April 14, 2006
Revision 1.1