W83791G Datasheet, PDF (57/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
7.53 FAN 2 Pre-Scale Register ⎯ Index 82h (Bank 0)
Power on default: 01h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7 PWM_CLK_SEL2 R/W
PWM 2 Input Clock Select. This bit select Fan 2 input
clock to pre-scale divider.
0: 3 MHz 1: 125 KHz
6-0 PRE_SCALE2[6:0] R/W
Fan 2 Input Clock Pre-Scale. The divider of input
clock is the number defined by pre-scale. Thus, writing
0 transfers the input clock directly to counter. The
maximum divider is 128 (7Fh).
00h : divider is 1
01h : divider is 2
02h : divider is 3
:
:
PWM frequency = (Input clock / pre-scale) / 256
7.54 FAN2 Duty Cycle Select Register ⎯ Index 83h (Bank 0)
Power on default: FFh
BIT
NAME
ATTRIBUTE
DESCRIPTION
7-0 F2_DC[7:0] R/W
Fan 2 Duty Cycle. This 8-bit register determines the
number of input clock cycles, out of 256-cycle period, during
which the PWM output is high. During smart fan 2 control
mode, read this register will return smart fan duty cycle.
00h: PWM output is always logical Low.
FFh: PWM output is always logical High.
XXh: PWM output logical High percentage is XX/256*100%
during one cycle.
7.55 FAN 1/2 Configuration Register ⎯ Index 84h (Bank 0)
Power on default: 00h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7-6 Reserved
Reserved
5-4 FAN2_TYPE R/W
FAN 2 PWM Control Type.
00 - Manual PWM Control Mode. (Default)
01 - Thermal Cruise mode.
10 - Fan Speed Cruise Mode.
11 - Reserved.
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Publication Release Date: April 14, 2006
Revision 1.1