W83791G Datasheet, PDF (36/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
Program procedure:
1. Set Flash address (3-bytes)
2. Set Flash Data (4-bytes)
3. Set Flash control “Program mode”
4. Set program command active (PROG_ACTIVE)
Erase 4K:
1. Set Flash Address (must be 4K address boundary)
2. Set Flash control register
7.4 Event Trigger Timeout Register ⎯ Index 08h (Bank 0)
Power on default: 00h
BIT
NAME
7:0 ^TRIG_TIME
ATTRIBUTE
R/W
DESCRIPTION
Event Trigger Timeout Timer Setting. When software or
firmware write trigger event, that don’t write to speech queue
until this register is timeout. This unit is Second. Default is
00, that is, the software event doesn’t need to wait then write
to sound event queue. Note that, this function is controlled by
Speech Input Property (Index 0Ah).
7.5 Speech Programmable Trigger Register ⎯ Index 09h (Bank 0)
Power on default: 80h
BIT
NAME
7 ^TR_RDY
6:0 TRIG_REG
ATTRIBUTE
RO
R/W
DESCRIPTION
Programmable Trigger Register Ready. If return to 1, the
software or firmware can write next event to trigger register.
If return to 0, the software or firmware cannot write trigger
event to event queue, that is, the timer is not timeout yet.
Speech Programmable Trigger Register. The software or
firmware can set these bits to trigger speech sound. The
vectors of sound trigger are shown as follows. If the bit of
trigger register ready is logic 0, this trigger register will be
ignored. Therefore, the bit of the trigger ready should be read
before programming this register.
TRIG_REG<6:0> Speech Sound Vector
00h
Vector 80h (1000_0000b) (=80h+00h)
01h
Vector 81h (1000_0001b) (=80h+01h)
02h
Vector 82h (1000_0010b) (=80h+02h)
:
:
N
Vector (80h+n)
:
:
7Eh
Vector FEh (1111_1110b) (=80h+7Eh)
7Fh
Vector FFh (1111_1111b) (=80h+7Fh)
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Publication Release Date: April 14, 2006
Revision 1.1