W83791G Datasheet, PDF (67/99 Pages) Winbond – Winbond H/W Monitoring IC

W83791D/G
7.79 SMI# Mask Register III ⎯ Index 9Ch (Bank 0)
Power on default: 00h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7
Reserved
Reserved.
6
FAN5
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt.
5
FAN4
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt.
4
VBAT
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt.
3
VSB
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt.
2
TART3
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt. (Target temperature 3)
1
TART2
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt. (Target temperature 2)
0
TART1
R/W
A one disables the corresponding interrupt status bit for SMI#
interrupt. (Target temperature 1)
7.80 Interrupt Mask Register III ⎯ Index 9Dh (Bank 0)
Power on default: 00h
BIT
NAME
ATTRIBUTE
DESCRIPTION
7
Reserved
Reserved.
6
FAN5
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt.
5
FAN4
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt.
4
VBAT
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt.
3
VSB
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt.
2
TART3
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt. (Target temperature 3)
1
TART2
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt. (Target temperature 2)
0
TART1
R/W
A one disables the corresponding interrupt status bit for IRQ
interrupt. (Target temperature 1)
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Publication Release Date: April 14, 2006
Revision 1.1