W83977F-A Datasheet, PDF (60/182 Pages) Winbond – WINBOND I/O

W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
TABLE: INTERRUPT CONTROL FUNCTION
ISR
INTERRUPT SET AND FUNCTION
Bit 3 Bit 2 Bit 1 Bit 0 _{Interrupt Interrupt Type Interrupt Source}
priority
Clear Interrupt
0
0
0
1
-
-
No Interrupt pending
-
0
1
1
0 First
IR Receive
Status
1. OER = 1 2. PBER =1 Read USR
3. NSER = 1 4. SBD = 1
0
1
0
0 Second RBR Data
Ready
1. RBR data ready
2. FIFO interrupt active
level reached
1. Read RBR
2. Read RBR until
FIFO data under
active level
1
1
0
0 Second FIFO Data
Time-out
Data present in RX FIFO
for 4 characters period of
time since last access of
RX FIFO.
Read RBR
0
0
1
0 Third
TBR Empty
TBR empty
1. Write data into TBR
2. Read ISR (if priority
is third)
** Bit 3 of ISR is enabled when bit 0 of UFR is a logical 1.
Advanced IR:
Bit 7:
TMR_I - Timer Interrupt.
Bit 6:
Set to 1 when timer count to logical 0. This bit is valid when: (1) the timer registers are
defined in Set4.Reg0 and Set4.Reg1; (2) EN_TMR(Enable Timer, in Set4.Reg2.Bit0) is
set to 1; (3) ENTMR_I (Enable Timer Interrupt, in Set0.Reg1.Bit7) is set to 1.
MIR, FIR modes:
FSF_I - Frame Status FIFO Interrupt.
Set to 1 when Frame Status FIFO is equal or larger than the threshold level or Frame
Status FIFO time-out occurs. Cleared to 0 when Frame Status FIFO is below the
threshold level.
Advanced SIR/ASK-IR, Remote IR modes: Not used.
Bit 5:
TXTH_I - Transmitter Threshold Interrupt.
Bit 4:
Set to 1 if the TBR (Transmitter Buffer Register) FIFO is below the threshold level.
Cleared to 0 if the TBR (Transmitter Buffer Register) FIFO is above the threshold level.
MIR, FIR, Remote IR Modes:
DMA_I - DMA Interrupt.
Set to 1 if the DMA controller 8237A sends a TC (Terminal Count) to I/O device which
might be a Transmitter TC or a Receiver TC. Cleared to 0 when this register is read.
Bit 3:
HS_I - Handshake Status Interrupt.
Set to 1 when the Handshake Status Register has a toggle. Cleared to 0 when
Handshake Status Register (HSR) is read. Note that in all IR modes including SIR, ASK-
IR, MIR, FIR, and Remote Control IR, this bit defaults to be inactive unless IR Handshake
Status Enable (IRHS_EN) is set to 1.
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