W83977F-A Datasheet, PDF (100/182 Pages) Winbond – WINBOND I/O

W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Bit 2: Read/Write
1
Disables DMA and all of the service interrupts.
0
Enables one of the following cases of interrupts. When one of the service interrupts
has occurred, the serviceIntr bit is set to a 1 by hardware. This bit must be reset to
0 to re-enable the interrupts. Writing a 1 to this bit will not cause an interrupt.
(a) dmaEn = 1: During DMA this bit is set to a 1 when terminal count is reached.
(b) dmaEn = 0 direction = 0: This bit is set to 1 whenever there are writeIntr
Threshold or more bytes free in the FIFO.
(c) dmaEn = 0 direction = 1: This bit is set to 1 whenever there are readIntr
Threshold or more valid bytes to be read from the FIFO.
Bit 1: Read only
0
The FIFO has at least 1 free byte.
1
The FIFO cannot accept another byte or the FIFO is completely full.
Bit 0: Read only
0
The FIFO contains at least 1 byte of data.
1
The FIFO is completely empty.
8.3.11 Bit Map of ECP Port Registers
data
ecpAFifo
dsr
dcr
cFifo
ecpDFifo
tFifo
cnfgA
cnfgB
ecr
D7
D6
D5
D4
PD7
PD6
PD5
PD4
Addr/RLE Address or RLE field
nBusy
nAck PError Select
1
1
Directio ackIntEn
Parallel Port Data FIFO
ECP Data FIFO
Test FIFO
0
0
0
1
compress intrValue
1
1
MODE
nErrIntrEn
Notes:
1. These registers are available in all modes.
2. All FIFOs use one common 16-byte FIFO.
D3
PD3
nFault
SelectIn
0
1
dmaEn
D2
PD2
1
nInit
0
1
serviceIntr
D1
PD1
1
autofd
0
1
full
D0
PD0
1
strobe
0
1
empty
NOTE
2
1
1
2
2
2
-92