W83977F-A Datasheet, PDF (107/182 Pages) Winbond – WINBOND I/O

W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Update Period and UIP Timing
Update Period(1 Second)
tBUC
tUC
9.3 REGISTERS
The RTC has four control/status registers. They are accessible at all times.
9.3.1 Register 0Ah
• All bits are unaffected by RESET.
• Register A is a read/write register except bit 7 (UIP is read only).
BIT
7
6
5
4
3
2
1
0
NAME
UIP
DV2
DV1
DV0
RS3
RS2
RS1
RS0
UIP : (read only)
When UIP is 1, an update cycle is in progress. The UIP is cleared in the end of an update cycle and
when the SET bit in register B is 1.
DV[2:0] : Divider Control
These three bits are used to control divider and 32KHz oscillator.
TIME-BASE DV2 DV1 DV0
FREQUENCY
OPERATION MODE
DIVIDER RESET
32.768KHZ
0
0
X
NO
-
32.768KHZ
0
1
0
YES
-
32.768KHZ
0
1
1
NO
-
32.768KHZ
1
0
X
NO
-
32.768KHZ
1
1
X
NO
YES
RS[3:0] : Periodic Interrupt Rate
Publication Release Date: May 2006
-99 -
Revision 0.60