W83977F-A Datasheet, PDF (126/182 Pages) Winbond – WINBOND I/O

W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
12.1.2 Sleep State
In this state, Plug and Play wait for a Wake[CSN] command. This command will selectively enable
one or more cards to enter either the Isolation or Configure states based on the write data and the
value of the CSN on each card. If the write data for the Wake[CSN] command is zero then all cards
that have not been assigned a CSN will enter the Isolation state. If the write data for the Wake[CSN]
command is not zero then the one card whose assigned CSN matches the parameter of the
Wake[CSN] command will enter the Configure state.
12.1.3 Isolation State
In this state, Plug and Play cards respond to reads of the Serial Isolation registers according to
Isolation protocol. An unique CSN is assigned after the card is isolated
12.1.4 Configure State
A card in the Configure state responds to all configuration commands including reading the card's
resource configure information and programming the card's resource selections. Only one card may
be in this state at a time.
12.2 Compatible PnP
12.2.1 Extended Function Registers
In Compatible PnP, there are two ways to enter Extended Function mode (which is same as Configure
State in Comply PnP) and read or write the configuration registers. HEFRAS (CR26 bit 6) can be
used to select one out of these two methods of entering the Extended Function mode as follows:
HEFRAS
0
1
ADDRESS AND VALUE
write 87h to the location 3F0h twice
write 87h to the location 370h twice
After Power-on reset, the value on RTSA (pin 43) is latched by HEFRAS of CR26. In Compatible
PnP, a specific value (87h) must be written twice to the Extended Functions Enable Register (I/O port
address 3F0h or 370h). Secondly, an index value (02h, 07h-FEh) must be written to the Extended
Functions Index Register (I/O port address 3F0h or 370h same as Extended Functions Enable
Register) to identify which configuration register is to be accessed. The designer can then access the
desired configuration register through the Extended Functions Data Register (I/O port address 3F1h
or 371h).
After programming of the configuration register is finished, an additional value(AAh) should be written
to EFERs to exit the Extended Function mode to prevent unintentional access to those configuration
registers. The designer can also set bit 5 of CR26 (LOCKREG) to high to protect the configuration
registers against accidental accesses.
The configuration registers can be reset to their default or hardware settings only by a cold reset (pin
MR = 1). A warm reset will not affect the configuration registers.
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