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W83977F-A Datasheet, PDF (16/182 Pages) Winbond – WINBOND I/O
W83977F-A/ W83977G-A/ W83977AF-A/ W83977AG-A
Host Interface, continued.
SYMBOL PIN
IRQ14
103
GP14
( GPACS )
PLED
IRSL1
IRQ15
104
GP15
( GPAWE )
WDT
IRSL2
CLKIN
1
I/O
OUT12t
I/O12t
OUT12t
OUT12t
OUT12t
I/O12t
OUT12t
OUT12t
INt
FUNCTION
CR2C bit1, 0= 00 (default): Interrupt request 14
CR2C bit1, 0= 01: General purpose I/O port 1, bit 4. It can be configured
as a general purpose address decode output.
CR2C bit1, 0= 10: Power LED output.
CR2C bit1, 0= 11: IR module select signal 1. [W83977AF only]
CR2C bit3, 2= 00 (default): Interrupt request 15
CR2C bit3, 2= 01: General purpose I/O port 1, bit 5. It can be configured
as a general purpose address write enable output.
CR2C bit3, 2= 10: Watch-Dog timer output.
CR2C bit3, 2= 11: IR module select signal 2. [W83977AF only]
14.318/ 24 Mhz clock input, selectable through bit 5 of CR24.
4.2 Advanced Power Management
SYMBOL
PHRI
GP20
(KBRST)
PIN
I/O
FUNCTION
69
INt
CR2B bit2, 1=00 (default): Advanced Power Management (APM) phone
ring indicator. Detection of an active PHRI pulse or pulse train activates
the PSCTL signal.
CR2B bit2, 1=01: General purpose I/O port 2, bit 0. It can be configured
I/O12t as keyboard reset (Keyboard P20).
POFIRQ
GP21 (P13)
P16
RIC
VSB
PSCTL
GP22 (P14)
PANSW
70 OUT12t CR2B bit4, 3=00 (default): Advanced Power Management (APM) power
off interrupt request.
I/O12t CR2B bit4, 3=01: General purpose I/O port 2, bit 1. It can be configured
as Keyboard P13 I/O port.
I/O12t
INt
CR2B bit4, 3=10: Keyboard P16 I/O port.
CR2B bit4, 3=11: RI input of UART C. [W83977AF only]
71
-
Advanced Power Management (APM) standby current source
72 OUT12t CR2B bit5=0 (default): On/Off control for Advanced Power Management
(APM). This signal tells the main power supply whether power should be
turned on.
I/O12t
CR2B bit5=1: General purpose I/O port 2, bit 2. It can be configured as
Keyboard P14 I/O port.
73
INt
CR2B bit7, 6=00 (default): On/Off switch for Advanced Power
Management (APM). This signal indicates a request to switch the power
on or off. When the VDD of the chip is disrupted, a high to low transition
on this pin indicates a switch on request. When VDD returns, a high to
low transition on this pin indicates a switch off request.
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