W29N02GVSIAA Datasheet, PDF (36/79 Pages) Winbond – W29N02GV 2G-BIT 3.3V NAND FLASH MEMORY

W29N02GV
RY/#BY
l/Ox
80h
Address Inputs Data Input
Page program
Setup code
A0-A11=Valid
A12-A17=set to `Low`
A18=set to `Low`
A19-A28=set to `Low`
11h
Confirm
Code
tDBSY
tPROG
(Program busy time)
Busy
※
81h
Address Inputs
Data Input 10h
Multiplane Page
Program setup
code
A0-A11=Valid
A12-A17=Valid
A18=set to `High`
A19-A28=Valid
Confirm
Code
Busy
70h SR0
Read Status
Register
1)The same row address, except for A18, is applied to the two blocks.
2)Any command between 11h and 81h is prohibited except 70h,78h,and FFh
Data
Input
※81h:Traditional Protocol 80h:ONFI Protocol
80h
11h
FirstPlane
(1024 block)
Block 0
Block 2
:
Block 2044
Block 2046
81h
10h
Second Plane
(1024 block)
Block 1
Block 3
:
Block 2045
Block 2047
Figure 9-16 Two Plane Page Program
Release Date: February 1^st, 2016
36
– Revision B