W29N02GVSIAA Datasheet, PDF (21/79 Pages) Winbond – W29N02GV 2G-BIT 3.3V NAND FLASH MEMORY

W29N02GV
9.1.2.3. LAST ADDRESS CACHE READ (3Fh)
The LAST ADDRESS CACHE READ (3Fh) copies a page of data from the Data Register to the Cache
Register without starting the another cache read. After writing the 3Fh command, RY/#BY signal goes
LOW and STATUS REGISTER bits 6 and 5 equals “00” for the period of tRCBSY. When RY/#BY
signal goes HIGH and STATUS REGISTER bits 6 and 5 equals “11”, the Cache Register data is
available, and the device NAND array is in ready state. The data can read out from the Cache Register
by toggling #RE, starting at address column 0 or us RANDOM DATA OUTPUT (05h-E0h) command
to change the column address to read out the data.
CLE
#CE
#WE
ALE
l/Ox
#RE
RY/#BY
Page N
Address(5cycles)
31h
tRCBSY
DataOutput
(Serial Access)
3Fh
Page N DataOut
tRCBSY
Figure 9-4 Last Address Cache Read Operation
Don’t care
9.1.3 TWO PLANE READ (00h-00h-30h)
TWO PLANE READ (00h-00h-30h) transfers two pages data from the NAND array to the data
registers. Each page address have to be indicated different plane address.
To set the TWO PLANE READ mode, write the 00h command to the command register, and then
write five address cycles for plane 0. Secondly, write the 00h command to the command register, and
five address cycles for plane 1. Finally, the 30h command is issued. The first-plane and second-plane
addresses must be identical for all of issued address except plane address.
After the 30h command is written, page data is transferred from both planes to their respective data
registers in tR. RY/#BY goes LOW While these are transfered,. When the transfers are complete,
RY/#BY goes HIGH. To read out the data, at first, system writes TWO PLANE RAMDOM DATA READ
(06h-E0h) command to select a plane, next, repeatedly pulse #RE to read out the data from selected
plane. To change the plane address, issues TWO PLANE RANDOM DATA READ (06h-E0h)
command to select the another plane address, then repeatedly pulse #RE to read out the data from
the selected plane data register.
Alternatively, data transfers can be monitored by the READ STATUS (70h). When the transfers are
complete, status register bit 6 is set to 1. To read data from the first of the two planes even when
Release Date: February 1^st, 2016
21
– Revision B