W29N02GVSIAA Datasheet, PDF (30/79 Pages) Winbond – W29N02GV 2G-BIT 3.3V NAND FLASH MEMORY

W29N02GV
9.1.8 READ STATUS ENHANCED (78h)
The READ STATUS ENHANCED (78h) command returns the status of the addressed plane on a
target even when it is busy (SR BIT 6 = 0).
Writing 78h to the command register, followed by three row address cycles containing the page, plane
and block addresses that is same as executed addresses, puts the device into read status mode. The
device stays in this mode until another valid command is issued
The device status is returned when the host requests data output. The SR BIT 6 and SR bit 5 bits of
the status register are shared for all planes on the device. The SR BIT 1 and SR BIT 0 (SR bit0) bits
are specific to the plane specified in the row address.
The READ STATUS ENHANCED (78h) command also enables the device for data output. To begin
data output following a READ operation after the device is ready (SR BIT 6 = 1), issue the READ
MODE (00h) command, then begin data output. If the host needs to change the cache register that
will output data, use the TWO PLANE RANDOMDATA READ (06h-E0h) command after the device
is ready
Use of the READ STATUS ENHANCED (78h) command is prohibited when OTP mode is enabled. It
is also prohibited following some of the other reset, identification.
CLE
#CE
#WE
ALE
#RE
I/O×
78h
Address (3cycles)
Status Output
Figure 9-10 Read Status Enhanced (78h) Operation
Release Date: February 1^st, 2016
30
– Revision B