W29N02GVSIAA Datasheet, PDF (2/79 Pages) Winbond – W29N02GV 2G-BIT 3.3V NAND FLASH MEMORY

W29N02GV
Table of Contents
1.
GENERAL DESCRIPTION ............................................................................................................7
2.
FEATURES ....................................................................................................................................7
3.
PACKAGE TYPES AND PIN CONFIGURATIONS .......................................................................8
3.1 Pin assignment 48-pin TSOP1(x8) .......................................................................................8
3.2 Pin assignment 63 ball VFBGA (x8) .....................................................................................9
3.3 Pin Descriptions ..................................................................................................................10
4.
PIN DESCRITPIONS ...................................................................................................................11
4.1 Chip Enable (#CE) ..............................................................................................................11
4.2 Write Enable (#WE) ............................................................................................................11
4.3 Read Enable (#RE).............................................................................................................11
4.4 Address Latch Enable (ALE) ..............................................................................................11
4.5 Command Latch Enable (CLE)...........................................................................................11
4.6 Write Protect (#WP)............................................................................................................11
4.7 Ready/Busy (RY/#BY) ........................................................................................................11
4.8 Input and Output (I/Ox) .......................................................................................................11
5.
BLOCK DIAGRAM .......................................................................................................................12
6.
MEMORY ARRAY ORGANIZATION ...........................................................................................13
6.1 Array Organization (x8).......................................................................................................13
7.
MODE SELECTION TABLE ........................................................................................................14
8.
COMMAND TABLE......................................................................................................................15
9.
DEVICE OPERATIONS ...............................................................................................................17
9.1 READ operation ..................................................................................................................17
9.1.1 PAGE READ (00h-30h) ........................................................................................................ 17
9.1.2 CACHE READ OPERATIONS .............................................................................................. 17
9.1.3 TWO PLANE READ (00h-00h-30h) ...................................................................................... 21
9.1.4 RANDOM DATA OUTPUT (05h-E0h)................................................................................... 23
9.1.5 READ ID (90h) ...................................................................................................................... 25
9.1.6 READ PARAMETER PAGE (ECh) ....................................................................................... 26
9.1.7 READ STATUS (70h) ........................................................................................................... 28
9.1.8 READ STATUS ENHANCED (78h) ...................................................................................... 30
9.1.9 READ UNIQUE ID (EDh) ...................................................................................................... 31
9.2 PROGRAM operation .........................................................................................................32
9.2.1 PAGE PROGRAM (80h-10h)................................................................................................ 32
9.2.2 SERIAL DATA INPUT (80h) ................................................................................................. 32
9.2.3 RANDOM DATA INPUT (85h) .............................................................................................. 33
9.2.4 CACHE PROGRAM (80h-15h) ............................................................................................. 33
9.2.5 TWO PLANE PAGE PROGRAM .......................................................................................... 35
9.3 COPY BACK operation.......................................................................................................38
9.3.1 READ for COPY BACK (00h-35h) ........................................................................................ 38
9.3.2 PROGRAM for COPY BACK (85h-10h)................................................................................ 38
9.3.3 TWO PLANE READ for COPY BACK................................................................................... 39
9.3.4 TWO PLANE PROGRAM for COPY BACK .......................................................................... 39
9.4 BLOCK ERASE operation ..................................................................................................43
Release Date: February 1^st, 2016
2
– Revision B