W29N02GVSIAA Datasheet, PDF (23/79 Pages) Winbond – W29N02GV 2G-BIT 3.3V NAND FLASH MEMORY

W29N02GV
9.1.4 RANDOM DATA OUTPUT (05h-E0h)
The RANDOM DATA OUTPUT allows the selection of random column addresses to read out data
from a single or multiple of addresses. The use of the RANDOM DATA OUTPUT command is
available after the PAGE READ (00h-30h) sequence by writing the 05h command following by the
two cycle column address and then the E0h command. Toggling #RE will output data sequentially.
The RANDOM DATA OUTPUT command can be issued multiple times, but limited to the current
loaded page.
tR
RY/#BY
#RE
I/Ox
00h Address(5cycles) 30h
Data out
05h
Address(2cycles) E0h
Figure 9-6 Random Data Output
Data out
9.1.4.1. TWO PLANE RANDOM DATA OUTPUT (06h-E0h)
TWO PLANE RANDOM DATA READ (06h-E0h) command can indicate to specified plane and
column address on cache register . This command is accepted by a device when it is ready.
Issuing 06h to the command register, two column address cycles, three row address cycles, E0h are
followed, this enables data output mode on the address device’s cache register at the specified
column address. After the E0h command , the host have to wait at least tWHR before requesting data
output. The selected device is in data output mode until another valid command is issued.
The TWO PLANE RANDOM DATA READ (06h-E0h) command is used to select the cache register
to be enabled for data output. When the data output is complete on the selected plane, the
command can be issued again to start data output on another plane.
If there is a need to update the column address without selecting a new cache register, the RANDOM
DATA READ (05h-E0h) command can be used instead.
Release Date: February 1^st, 2016
23
– Revision B