W83793G Datasheet, PDF (35/131 Pages) Winbond – Winbond H/W Monitor

W83793G
BIT
Name
Reset
7
6
Reserve
0
0
5
TART6
0
REAL_STS5
4
3
TART5 TART4
0
0
2
TART3
0
1
TART2
0
0
TART1
0
8.5.2.4 SMI/IRQ Control Register (SMIINT_Ctrl)
Location :
Type :
Bank 0 Address 50_HEX
Read / Write
Reset :
VSB5V(Pin 7) Rising,
Init Reset (CR40.Bit7) is set,
VDD5V (Pin 25) Rising @ RST_VDD_MD (CR40.Bit4) set,
SYSRSTIN_N (Pin 15) Falling @ SYSRST_MD (CR40.Bit5) set.
BIT
Name
Reset
7
6
Reserve
0
0
SMIINT_CTRL
5
4
3
2
1
0
IRQ_MD IRQSEL
TEMP_SMI_MD EN_IRQSMI POL
0
0
0
0
0
0
BIT
DESCRIPTION
7-6 Reserved.
IRQ_MD.
5
Set 0, IRQ output level signal. Set 1, output 200 us pulse signal. Default is 0.
IRQ_SEL.
4
Set Pin 3 to IRQ mode. While 1 and EN_IRQSMI set to 1, Pin 3 enabled with IRQ interrupt
output.
TEMP_SMI_MD.
Temperature SMI# Mode Select.
00_BIN : Comparator Interrupt Mode:(Default)
Temperature TD1/TD2/TD3/TD4/TR1/TR2 exceeds T_O (Over-temperature) limit causes
an interrupt and this interrupt will be reset by reading all the Interrupt Status.
3-2
01_BIN : Two Time Interrupt Mode:
These bits use in temperature sensor TD1/TD2/TD3/TD4/TR1/TR2 interrupt mode with
hysteresis type. Temperature exceeding T_O (Critical Temperature), causes an interrupt and
then temperature going below T_HYST (Critical Temperature Hysteresis) will also cause an
interrupt if the previous interrupt has been reset by reading all the interrupt Status Register.
Once an interrupt event has occurred by exceeding T_O (Critical Temperature), then reset, if
the temperature remains above the T_HYST (Critical Temperature Hysteresis).
- 31 -
Publication Release Date: Dec. 11, 2006
Revision 1.0