W83793G Datasheet, PDF (18/131 Pages) Winbond – Winbond H/W Monitor

W83793G
8.1.2.4 Winbond Version ID Register (Device ID)
Location:
Type:
Bank 0, 1, 2 Address 0F_HEX
Read Only
Reset:
No Reset
VERSION ID
BIT
7
6
5
4
3
2
1
0
Name
Fixed
11_HEX /12_HEX
DeviceID
BIT
DESCRIPTION
Version ID.
7-0
Device ID of W83793G B Version is 11_HEX, C Version is 12_HEX
8.2 Watch Dog Timer Registers
W83793G is built in with a Watch Dog Timer, which enable users to reset the system by Pin 14 while
system becomes abnormal. Once Watch Dog is enabled, W83793G starts to count down, and host
should set the timer for further count down or clear/disable the timer to prevent W83793G issue reset
signal.
8.2.1 Watch Dog Timer Registers Map
Watch Dog Timer is consisted of four registers. WDTLock and ENABLE_WDT are used to activate
Soft-WDT and Hard-WDT, respectively. WDT_STS and DownCounter can inform the host whether the
system is time up or not.
MNEMONIC
REGISTER NAME
TYPE
WDTLock.
Lock Watch Dog
WO
EnableWDT.
Watch Dog Enable
RO
WDT_STS.
Watch Dog Status
R/W
DownCounter.
Watch Dog Timer
R/W
Two kinds of watchdog timer functions are supported by W83793G. One is so-called Soft Watch Dog
Timer, and the other is Hard Watch Dog Timer.
Hard Watch Dog timer if enabled that will start a 4 minutes WDT after completion of system reset. (A
Low to High transition on SYSRSTIN# pin). BIOS need to write a 00_HEX into Watch Dog Timer Register
(04_HEX) to disable timer within 4 minutes, otherwise pin 14 WDTRST# will assert to reset system.
Soft Watch Dog Timer will start down counting whenever Timeout Time is set and Soft Watch Dog
Timer is enabled. A WDTRST# will be issued while the timer timeouts.
Soft Watch Dog Timer will be disabled automatically after received a SYSRSTIN_N low signal.
Bank0. CR40 [2]/ENWDT must set to 1 if there four Watch Dog Timer Registers want to be
programming.
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