MSP430FR2033 Datasheet, PDF (9/89 Pages) Texas Instruments – Mixed-Signal Microcontrollers

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MSP430FR2033, MSP430FR2032
SLASE45B – OCTOBER 2014 – REVISED AUGUST 2015
4.2 Signal Descriptions
Table 4-1 describes the signals for all device variants and package options.
Table 4-1. Signal Descriptions
NAME
P4.7
P4.6
P4.5
P4.4
P4.3
P4.2/XOUT
TERMINAL
PACKAGE SUFFIX
PM
G56 G48
1
7
7
2
8
8
3
9
9
4
10
10
5
11
11
6
12
12
P4.1/XIN
DVSS
DVCC
7
13
13
8
14
14
9
15
15
RST/NMI/SBWTDIO
10
16
16
TEST/SBWTCK
P4.0/TA1.1
P8.3/TA1.2 ⁽¹⁾
P8.2/TA1CLK ⁽¹⁾
P8.1/ACLK/A9 ⁽¹⁾
11
17
17
12
18
18
13
19
14
20
15
P8.0/SMCLK/A8 ⁽¹⁾
16
P1.7/TA0.1/TDO/A7 ⁽²⁾
17
21
19
P1.6/TA0.2/TDI/TCLK/A6 ⁽²⁾
18
22
20
I/O
DESCRIPTION
I/O General-purpose I/O
I/O General-purpose I/O
I/O General-purpose I/O
I/O General-purpose I/O
I/O General-purpose I/O
General-purpose I/O
I/O
Output terminal for crystal oscillator
General-purpose I/O
I/O
Input terminal for crystal oscillator
Power ground
Power supply
Reset input active low
I/O Nonmaskable interrupt input
Spy-Bi-Wire data input/output
Test Mode pin – selected digital I/O on JTAG pins
I
Spy-Bi-Wire input clock
General-purpose I/O
I/O
Timer TA1 CCR1 capture: CCI1A input, compare: Out1 outputs
General-purpose I/O
I/O
Timer TA1 CCR2 capture: CCI2A input, compare: Out2 outputs
General-purpose I/O
I/O
Timer clock input TACLK for TA1
General-purpose I/O
I/O ACLK output
Analog input A9
General-purpose I/O
I/O SMCLK output
Analog input A8
General-purpose I/O⁽²⁾
Timer TA0 CCR1 capture: CCI1A input, compare: Out1 outputs
I/O
Test data output
Analog input A7
General-purpose I/O⁽²⁾
Timer TA0 CCR2 capture: CCI2A input, compare: Out2 outputs
I/O
Test data input or test clock input
Analog input A6
(1) Any pin that is not bonded out in a smaller package must be initialized by software after reset to achieve the lowest leakage current.
(2) Because this pin is multiplexed with the JTAG function, TI recommends disabling the pin interrupt function while in JTAG debug to
prevent collisions.
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Terminal Configuration and Functions
9
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